Getting Machine to Machine Communication – IoT in The Real World

This presentation will explore the many options for machine to machine communication. It will look at options such as Wifi, Bluetooth, Zigbee, Wimax, Lte and HSPA and it will evaluate each in terms of throughput, range, coverage, power consumption, devices per network, security, topology, connection and reliability.

The presentation will also discuss hardware and software options as well as exploring options for Device to Cloud connectivity and security.

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Enabling PIC® Microcontroller Based Designs for Touch and Input Sensing Applications

With a powerful architecture, a range of 8-bit, 16-bit, and 32-bit offerings, flexible memory technologies and comprehensive easy-to-use development tools, the PIC Microcontroller series from Microchip has enabled many generations of low power devices. This presentation will introduce Microchip's implementations for Touch and other Input Sensing applications and will cover such topics as :

- Proximity, Keys, and Sliders
- Touch Screen and Touch Pad Controllers
- 3D Gesture Controller (detect gestures of the user and to track a movement)
- Haptics (provides tactile feedback to the user by applying forces or vibrations)

Adding a modern intuitive user interface to a design improves its ease of use, functionality and aesthetics. This presentation will explain how Microchip has opened up their algorithms and techniques to engineers, so that they have the freedom to innovate with an industry leading, robust, touch implementation on a vast range of PIC microcontrollers.

Presented By Adrian Amor, Director at Intelligent Display Solutions (an Official Microchip Design Partner)

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Live Demo: Analysis of PCI Express Link Initialisation and extraction of data from a USB capture using protocol analysers.

Protocol analysers have become an essential tool for engineers implementing or utilising high speed communication protocols such as PCI Express, USB, Ethernet, SAS/SATA, Fibre Channel etc. The complexity of these protocols means that there is plenty of opportunity for implementation errors to occur at the Physical, logical and software layers.

Many protocol issues manifest themselves when a system initialises and the first half of this demonstration will show how a protocol analyser can be used to quickly identify the capabilities of a PCI Express host and device and the state of the bus through and after initialisation. In the second half of the demonstration we will look at how the data payloads sent over a protocol can be intercepted and extracted. This will be done by capturing and extracting data from a USB data transfer.

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Model Driven Development: Benefits and Perils

The relentless growth in system complexity and the need to drive down time to market and cost of upgrades is prompting many organisations to migrate from document based, manual system development approaches towards model centric, automated methods of production. However, although model based approaches offer many strategic advantages to the wise adopter, there are numerous hazards that lie in wait for the unwary.

This presentation will illustrate how commercial and technical benefits can be achieved by judicious adoption and adaptation of model driven development. It will also outline some common modelling pitfalls, and show how they can be avoided to achieve the advertised rewards of an industrialised model driven development strategy.

Presenter : Chris Raistrick is Professional Services Director at Abstract Solutions, and lead author of the book “Model Driven Architecture with Executable UML”. For the past thirty years, Chris has been applying model driven approaches to a wide variety of successfully deployed systems, and has led the modelling activity on a number of strategic projects. Chris has authored many papers on model driven development, and speaks regularly at mainstream international conferences..

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JTAG,Boundary-scan essentials - What you need to know

This presentation starts form the beginning and explains how IEEE Std 1149.1 works are why it was developed by the JTAG committee over 25 years ago.

We will then explain what can be achieved with JTAG/boundary-scan on todays designs and also look at subsequent developments such as 1149.6 and testing via JTAG core access and 'embedded instruments'.

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Live Demo: Development and setup of compact functional test systems using JTAG & Ethernet

Traditional functional test systems tend to be either large, complex, costly – or all of these! New technologies allow development and test engineers to setup their own functional test system, based on a reconfigurable, modular approach that provides a complete mechanical, power, thermal and stimulation environment to the users’ Unit Under Test (UUT).

The demonstration will show how such a system can be setup and controlled using JTAG, as well as Ethernet, for use in R & D and volume manufacturing – including load testing, pulse and frequency measurement, power supply ramping and monitoring, analogue and digital I/O, plus ability to add bespoke test electronics.

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10.15 - 10.55am

Getting it ‘right first time’ with TT architectures

This presentation will be concerned with the development of software for real-time embedded systems that need to be reliable.  The real-world examples used in this talk will include both a controller for a washing machine and an automotive “Electronic Control Unit” (ECU).

Throughout the talk, the presenter will have a focus on time-triggered (TT) systems.  Implementation of a TT system will typically start with a single interrupt that is linked to the periodic overflow of a timer. This interrupt may drive a task scheduler (a simple form of “operating system”). The scheduler will – in turn – release the system tasks at predetermined points in time. 

In this presentation, we will argue that TT approaches provide an excellent foundation for reliable real-time systems because – during development and after construction – it is easy to model the system and, thereby, determine whether all of the key timing requirements have been met.  There will be examples of the kind of models in mind (and demonstrate how easy it is to create them). 

During the presentation, we will also argue that the deterministic behaviour of TT systems offers significant advantages when the design is up and running because – since we know precisely what the system should be doing at a given point in time – we can very quickly determine whether it is doing something wrong.  Again, we’ll use some practical examples to illustrate how easy it is to perform precise run-time monitoring on TT systems.

Presented by Michael J. Pont, SafeTTy Systems Ltd

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11.30 - 12.10pm

Is it Supposed To Do that ?  - Testing and Debugging Embedded Systems

Testing embedded systems can be fraught with difficulties. The systems are usually embedded deeply within something else with fixed memory available. The target they run on behaves differently to desktop PCs. They control real hardware, and take inputs from sensors and other machines so they frequently have a real-time element.

Many useful methods, techniques and families of tools that have been developed, but seem to have been forgotten about recently. This presentation will look at and evaluate the available types of tools, techniques and methods, starting from creating the system specification needed to validate the tests, through to final verification, and offer helpful ways of automating many of them.

Presented by Chris Hills of Phaedrus Systems

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Least Privilege Separation Kernel Hypervisors Explained

The concept of a Least Privilege Separation Kernel Hypervisor starts with a traditional Separation Kernel, designed to ensure that different blocks of a partitioned system are invisible to other blocks except for tightly controlled information flow. A Least Privilege Separation Kernel extends that model by subdividing the contexts of the blocks so that the information flow becomes even more tightly controlled. Finally, adding hypervisor functionality to that mix leaves you with a single platform capable of safely hosting multiple and differing subjects, irrespective of the required integrity level for each.

This presentation will introduce key design principles of and will explain how they allow developers to fully leverage the in-built hardware virtualization on today’s multicore processes. It will then go on to describe how typical real-world scenarios can make best use of this technology, in applications such as:

1. Secure IoT separation between Operation Technology and Information Technlogy

2. Platform consolidation through the virtualization of disparate environments

3. Virtualization of defunct target devices to provide a cost effective path to hardware refresh

4. Safe, single processor hosting of multiple subjects with differing safety and security integrity levels

Presenter Biography:

Mark Pitchford has over 25 years’ experience in software development for engineering applications. He has worked on many significant industrial and commercial projects in development and management, both in the UK and internationally. Since 2001, he has worked with development teams looking to achieve compliant software development in safety critical environments, working with standards such as DO-178, IEC61508 and ISO 26262.

Mark earned his Bachelor of Science degree at Trent University, Nottingham, and he has been a Chartered Engineer for almost 20 years. He now works throughout Europe, the Middle East and Africa as Technical Manager with Lynx Software Technologies.

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Designing a Software Component for Easy Code Reuse

This presentation will review the Cortex Microcontroller Software Interface Standard ( CMSIS) and introduce the new CMSIS Pack and CMSIS Driver standards.

The presentation will then show how to make a reusable software component with version and configuration control using the CMSIS Pack standard. Such a component can be used in house across multiple projects or distributed via a web server.

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Migrating to Git for Embedded Software Development? Caveat Emptor

Git is popular for version management during embedded software development due it being freely available, it’s flexibility and support by the community. Because of this companies are considering to migrate from SCM systems such as Subversion to give developers local copies of their source code with the objective of increasing their productivity.

This creates a problem of how to retain control over the release of software builds and being able to track them as a project progresses. This presentation discusses the key issues that need to be considered prior to moving to Git and the limitations of Git that can cause difficulties with traceability of software built for embedded systems.

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The Impact of a Certified Toolset in a High Integrity Software Development Environment.

Working to any of the key software standards such as DO-178C, EN50128, ISO26262 or IEC61508 drives onerous changes into the V cycle design process. This talk will demonstrate that using a qualified or certified toolset can dramatically streamline and automate many of the steps, as well as build quality and best practise into the design.

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